Assessing the Performance Limits of Parallelized Near-threshold Computing

Abstract

Supply voltage scaling has stagnated in recent technology nodes, leading to so-called “dark silicon.” In this paper, we investigate the limit of voltage scaling together with task parallelization to maintain task completion latency. When accounting for parallelization overheads, minimum task energy is obtained at “near threshold” supply-voltages across 6 commercial technology nodes and provides 4X improvement in overall CMP performance.

Publication
Proceedings of the 49th Annual Design Automation Conference
Date
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Nathaniel Pinckney
Senior Research Scientist