error correction

iRazor: Current-Based Error Detection and Correction Scheme for PVT Variation in 40-nm ARM Cortex-R4 Processor

This paper presents iRazor, a lightweight error detection and correction approach, to suppress the cycle time margin that is traditionally added to very large scale integration systems to tolerate process, voltage, and temperature variations. iRazor …

iRazor: 3-transistor current-based error detection and correction in an ARM Cortex-R4 processor

It is well known that technology scaling has led to increasing process/voltage/temperature/aging margins that substantially degrade performance and power in modern processors and SoCs. One approach to address these large timing margins is the use of …

Bubble Razor: Eliminating Timing Margins in an ARM Cortex-M3 Processor in 45 nm CMOS Using Architecturally Independent Error Detection and Correction

We propose Bubble Razor, an architecturally independent approach to timing error detection and correction that avoids hold-time issues and enables large timing speculation windows. A local stalling technique that can be automatically inserted into …

Bubble Razor: An architecture-independent approach to timing-error detection and correction

Several methods that eliminate timing margins by detecting and correcting transient delay errors have been proposed. These Razor-style systems replace critical flip-flops with ones that detect late arriving signals, and use architectural replay to …