Nathaniel Pinckney

Nathaniel Pinckney

Senior Research Scientist

Accelerators and VLSI Research Group

NVIDIAAustin, TX2015-Present

I'm Nate Pinckney. I received my Ph.D. in Electrical Engineering from the University of Michigan in 2015 and am currently a Senior Research Scientist at NVIDIA in Austin, Texas. My work spans deep learning accelerators, high-level synthesis methodologies, low-power VLSI design, and cryptographic hardware, with over 40 publications in these areas. I have full flow experience from architecture down to physical implementation and circuits.

I am a co-author of the industry-adopted Connections and MatchLib SystemC HLS libraries. More recently, my research has focused on evaluating large language models and AI agents for hardware design, including co-creating the VerilogEval and Comprehensive Verilog Design Problems (CVDP) benchmarks.

I lead collaborative initiatives across industry and academia, serving as Chair of the Si2 LLM Benchmarking Coalition, Sponsorship/Industry Relations Chair for the International Conference on LLM-Aided Design (ICLAD), and as a technical subcommittee member for both DAC and ISSCC.

I'm an Eagle Scout. In my spare time, my wife and I enjoy playing board games, playtesting prototypes, and attending many board game conventions across the US.

Research Interests

  • AI/ML for Hardware Design
  • Deep Learning Accelerators
  • High-Level Synthesis
  • Computer Architecture
  • Low-Power VLSI Design
  • Cryptographic Hardware
OngoingPrior

Publications

3,360
Citations
27
h-index
42
i10-index

Last updated: 2026-01-31

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Leadership & Service

Si2 LLM Benchmarking Coalition

Founding Chair

2025-Present

International Conference on LLM-Aided Design (ICLAD)

Sponsorship/Industry Relations Chair

2025-Present

Design Automation Conference (DAC)

Research Technical Program Subcommittee Member - AI/ML Frontiers for Hardware Design

2025-Present

International Solid State Circuits Conference (ISSCC)

Technical Subcommittee Member - Digital Architectures & Systems (DAS)

2024-Present

Accellera SystemC Synthesis Working Group

Member

2024-Present

Background

Education

PhD in Electrical Engineering

University of Michigan

Adviser: David Blaauw

2015

MS in Electrical Engineering

University of Michigan

Adviser: David Blaauw

2012

BS in Engineering

Harvey Mudd College

Adviser: David M. Harris

2008

Experience

NVIDIA

Senior Research Scientist

2015-Present

Oracle Labs

Intern

2013

Qualcomm

Intern

2012

Sun Microsystems / Oracle Labs

Member of Technical Staff

2008-2010

Interested in connecting? Reach out to me on LinkedIn.